SMU Assignment (Sem-1) MCA1010- FUNDAMENTALS OF COMPUTER AND IT

MCA1010- FUNDAMENTALS OF COMPUTER AND IT

Q1.)    Compare first generation and second generation computers.

Ans.)   The First Generation Computers:

The first generation computers were developed during 1943-1958. It used vacuum tubes as the active electronic components & was therefore very large. However some of the features are as follows-

1.      They were extremely large & occupied a very large space.

2.      They used vacuum tubes as memory device.

3.      They were very expensive & consumed a lot of electrical power.

4.      The operating speed was measured in milliseconds.

5.      These computers had low level of accuracy & reliability.

6.      Storage capacity was too small only 1 to 4kb.

7.      They used machine level programming language.

The examples are - UNIVAC, ENIAC, EDSAC, & EDVAC

The Second Generation Computers:

The second generation computers were developed during 1959-1965. The invention of the transistor by three scientists of Bell Telephone Laboratories in 1947 greatly changed the development of computers. However some of the features are as follows-

1.      These computers used transistor.

2.      They were smaller, faster & cheaper than first generation of computers.

3.      They consumed less electrical power than first generation.

4.      The operating speed was measured in microseconds.

5.      They were more reliable & accurate than the first generation computers.

6.      They could understand high level language such as COBOL.

7.      Magnetic tapes were used as secondary storage media.

The examples are – IBM 1620, IBM 1401, & CDC 3600.

--------------------------------------------------------------------------------------------------------------------------

Q2.)    Differentiate between integrated Circuits and microprocessors.

Ans.)   Integrated Circuits:

The development of the integrated circuit was the hallmark of the third generation of computers. A non-metallic chemical element in the carbon family of elements Silicon – atomic symbol “Si” is the second most abundant element in the earth’s crust, surpassed only by oxygen. Silicon does not happen uncombined in nature. Sand & almost all rocks contain silicon combined with oxygen, forming silica. When silicon combines with other elements, such as iron, aluminum or potassium, a silicate is formed.

A chip is a small piece of semi conducting material (usually silicon) on which an integrated circuit is embedded. A typical chip is less than ¼ - square inches & can contain millions of electronic components (transistors).

Semiconductor is a material that is neither a good conductor of electricity (like copper) nor a good insulator (like rubber). The most common semiconductor materials are silicon & germanium. These materials are then doped to create an excess or lack of electrons.

Computer chips, both for CPU & memory, are composed of semiconductor materials. Semiconductors make it possible to miniaturize electronic components, such as transistors. Not only does miniaturization mean that the components take up less space, it also means that they are faster & require less energy.

Microprocessors:

The microprocessor brought the fourth generation of computers, as thousands of integrated circuits we rebuilt onto a single silicon chip & this will contains a Central Processing Unit. In the world of personal computers, the terms microprocessor & CPU are used interchangeably. At the heart of all personal computers & most workstations sits a microprocessor.

The integration of a whole CPU onto a single chip or on a few chips greatly reduced the cost of processing power. The integrated circuit processor was produced in large numbers by highly automated processes, so unit cost was low.

Single-chip processors increase reliability as there are many fewer electrical connections to fail. As microprocessor designs get faster, the cost of manufacturing a chip (with smaller components built on a semiconductor chip the same size) generally stays the same.

Microprocessors also control the logic of almost all digital devices, from clock radios to fuel-injection systems for automobiles. The internal arrangement of a microprocessor varies depending on the age of the design & the intended purposes of the processor.

--------------------------------------------------------------------------------------------------------------------------

Q3.)    What is the significance of Processor mode? Explain three types of processor modes.

Ans.)   Processor modes refer to the various ways that the processor creates an operating environment for itself. Specifically, the processor mode controls how the processor sees & manages the system memory & the tasks that use it. There are three different modes of operation that resulted from the evolution of the PC from its humble beginnings with the Intel 8088 chip.

The concepts of processor modes in generic term, mode is a way that creates a system for itself for its processor creation & operations. Processor mode is responsible for managing & controlling the system memory & its use. Processor modes refer to the various operating environments & affect the instructions & capabilities of the chip. The processor mode controls how the processor sees & manages the system memory & the tasks that use it.

Processor modes are classified into three types as:

1.      Real Mode: This mode operates CPU in a limited environment. The real mode has the advantage of accessing speed. It is compatible with Intel 8088 chip. All processors can support real mode. Computers normally boot up in real mode or DOS mode.

2.      Protected Mode: This mode used in modern multitasking operating systems was first implemented in 80826. Protected Mode has several advantages. It offers faster access to memory

      a.      It supports multitasking facility that manages the operating.

      b.      System in the execution of many programs at a time.

      c.       There is no limit for accessing the memory.

      d.      It allows the computers to use additional memory whenever

      e.      Needed along with the support of virtual memory.

3.      Virtual Real Mode: This mode of operation is the enhancement of protected mode. Protected mode is used to run graphical multitasking OS like windows. If you want to run DOS program in the windows system then you would have to use the virtual real mode. This is because the necessity of running DOS program on real mode & not in protected mode has given rise to the virtual real mode. This mode will simulate the real mode to start in the protected mode & help in running DOS programs in windows. The virtual machine will have separate address space dedicated to it, which helps in invoking this feature of operating virtual real mode machines.

--------------------------------------------------------------------------------------------------------------------------

Q4.)    Explain the features of a mouse and a track ball

Ans.)   Mouse:

It is most common pointing input device. The data is entered by pointing the mouse to a location on the computer screen. The mouse may also be used to position the cursor on screen, move an object by dragging, or select an object by clicking. The key benefit of using a mouse is that the cursor moves with the mouse. So, the cursor can be positioned at any location on the screen by simply moving the mouse. Moreover, it provides an easy way to select & choose commands from menus, dialog boxes, icons, etc. Mouse is used extensively, while working with graphics elements such as line, curve, shapes, etc.

Trackball:

Trackball is a device that is a variant of the mouse but has the functionality of mouse. It is easy to use & takes less space than a mouse. Trackball is generally built in laptops since there is no space for the mouse to move on the lap. Trackballs come in various sizes- small & big.

--------------------------------------------------------------------------------------------------------------------------

Q5.)    What is data communication? Explain different Data Transmission methods.

Ans.)   Data communication is the transfer of data or information between a source & a receiver, the source transmits the data & the receiver receives it. The distance over which data moves within a single IC chip, to as much as several feet along the backplane of the main circuit board. Over such small distances, digital data may be transmitted as direct, two-level electrical signals over simple copper conductors. Except for the fastest computers, circuit designers are not very concerned about the shape of the conductor or the analog characteristics of signal transmission.

Data Transmission Methods:

Transmission media is the physical path between the transmitter & receiver. It can be guided or unguided.

Guided & unguided transmission medium

Guided media provides a guided (by a solid medium) path for propagation of signals such as twisted pairs, coaxial cables, optical fibers etc. Unguided media employ an antenna for transmitting through air, vacuum or water. This form of transmission is referred to as wireless transmission. For e.g. Broadcast radio, satellite etc.

Selection of transmission Media depends on the characteristics & quality of data transmission which are in turn determined by characteristics of the medium & signal. For guided media the medium itself in determining the limitations of transmission. For Unguided media Bandwidth (BW) width of the signal produced at the transmitting antenna is more important than characteristics of the transmission characteristics.

Factors used to determine data rate & distance are:

·         Bandwidth (BW): Greater the BW of the signal, higher the data rate that can be achieved.

·         Transmission impairment: These limit the distance. Twisted pair suffers more impairment than coaxial cable which in turn suffers more than optical fiber.

·         Interference: Overlapping frequency bands can distort/wipeout a signal. It is of more concern for unguided media than guided.

For guided it can be caused due to nearby cables. Proper shielding of cables can minimize this problem.

·         Number of receivers: Point to point links is used or a shared link is used with multiple attachments.

In a shared link, each attachment introduces some attenuation & distortion on the line limiting the distance and/or data rate.

--------------------------------------------------------------------------------------------------------------------------

Q6.)    What is an IP address? Describe the classes of IP addresses.

Ans.)   IP addresses are represented by a 32-bit unsigned binary value. It is usually expressed in a dotted decimal format. For example, 9.167.5.8 is a valid IP address. The numeric form is used by IP software. The mapping between the IP address and an easier-to-read symbolic name, for example, myhost.ibm.com, is done by the Domain Name System (DNS).

The classes of IP addresses:

Class A addresses:  These addresses use 7 bits for the <network> & 24 bits for the <host> portion of the IP address. This allows for 2⁷ – 2 (126) networks each with 2²⁴ – 2 (16777214) hosts – a total of more than 2 billion addresses.

Class B addresses:  These addresses use 14 bits for the <network> & 16 bits for the <host> portion of the IP address. This allows for 2²⁴ – 2 (16382) networks each with 2¹⁶ – 2 (65534) hosts – a total of more than 1 billion addresses.

Class C addresses:  These addresses use 21 bits for the <network> & 8 bits for the <host> portion of the IP address. That allows for 2²¹ – 2 (2097150) networks each with 2⁸ – 2 (254) hosts – a total of more than half a billion addresses.

Class D addresses:  These addresses are reserved for multi-casting (a sort of broadcasting, but in a limited area, & only to hosts using the same Class D address).

Class E addresses:  These addresses are reserved for future or experimental use.

--------------------------------------------------------------------------------------------------------------------------

SMU Assignment - (Sem-2) - MCA2010- OPERATING SYSTEM

MCA2010- OPERATING SYSTEM

Q1.)    Differentiate Simple Batch Operating Systems and Time-sharing Operating systems.

Ans.)    Simple Batch Operating Systems: -

In the earliest days digital computers usually run from a console. I/O devices consisted of card readers, tape drivers & line printers. Direct user interaction with the system did not exist. Users made a job consisting of programs, data & control information. The job was submitted to an operator who would execute the job on the computer system. The output appeared after minutes, hours or sometimes days. The user collected the output from the operator, which also included a memory dump. The operating system was very simple & its major task was to transfer control from one job to another. The operating system was resident in memory.

To speed up processing, jobs with the same needs were batched together & executed as a group. For ex, all FORTRAN jobs were batched together for execution; all COBOL jobs were batched together for execution and so on. Thus batch operating system came into existence. Even though processing speed increased to a large extent because of batch processing, the CPU was often idle. This is because of the disparity between operating speeds of electronic devices like the CPU & the mechanical I/O devices. CPU operates in the microsecond / nanosecond ranges whereas I/O devices work in the second / minute range. To overcome this problem the concept of SPOOLING came into picture. Instead of       reading from slow input devices like card readers into the computer memory & then processing the job, the input is first read into the disk. When the job is processed or executed, the input is read directly from the disk. Similarly when a job is executed for printing, the output is written into a buffer on the disk & actually printed later. This form of processing is known as spooling an acronym for Simultaneous Peripheral Operation on Line. Spooling uses the disk as a large buffer to read ahead as possible on input devices and for storing output until output devices are available to accept them.

Spooling overlaps I/O of one job with the computation of other jobs. For example, spooler may be reading the input of one job while printing the output of another and executing a third job Spooling increases the performance of the system by allowing both a faster CPU and slower I/O devices to work at higher operating rates.

Time-sharing Operating systems: -

Multi-programmed batch systems are suited for executing large jobs that need very little or no user interaction. On the other hand interactive jobs need on-line communication between the user and the system. Timesharing / multi tasking is a logical extension of multi-programming. It provides interactive use of the system.

CPU scheduling and multi-programming provide each user one time slice (slot) in a time-shared system. A program in execution is referred to as a process. A process executes for one time slice at a time. A process may need more than one time slice to complete. During a time slice a process may finish execution or go for an I/O. The I/O in this case is usually interactive like a user response from the keyboard or a display on the monitor. The CPU switches between processes at the end of a time slice. The switching between processes is so fast that the user gets the illusion that the CPU is executing only one user’s process.

Time-sharing operating systems are more complex than multi-programmed operating systems. This is because in multi-programming several jobs must be kept simultaneously in memory, which requires some form of memory management and protection. Jobs may have to be swapped in and out of main memory to the secondary memory. To achieve this goal a technique called virtual memory is used.

Virtual memory allows execution of a job that may not be completely in a memory. The main logic behind virtual memory is that programs to be executed can be larger physical memory, its execution takes place.

Multi-programming and Time-sharing are the main concepts in all modern operating systems.

--------------------------------------------------------------------------------------------------------------------------

Q2.)    Explain the different process states.

Ans.)    A process is executed sequentially, one instruction at a time. A program is a passive entity. Example: a file on the disk. A process on the other hand is an active entity. In addition to program code, it includes the values of the program counter, the contents of the CPU registers, the global variables in the data section and the contents of the stack that is used for subroutine calls. In reality, the CPU switches back and forth among processes.

A process being an active entity, changes state as execution proceeds. A process can be any one of the following states:

·         New: Process being created.

·         Running: Instructions being executed.

·         Waiting (Blocked): Process waiting for an event to occur.

·         Ready: Process waiting for CPU.

·         Terminated: Process has finished execution.

Locally, the ‘Running’ and ‘Ready’ states are similar. In both cases the process is willing to run, only in the case of ‘Ready’ state, there is temporarily no CPU available for it. The ‘Blocked’ state is different from the ‘Running’ and ‘Ready’ states in that the process cannot run, even if the CPU is available.

These above states are arbitrary and very between operating systems. Certain operating systems also distinguish among more finely delineating process states. It is important to realize that only one process can be running on any processor at any instant. Many processes may be ready and waiting. A state diagram is used to diagrammatically represent the states and also the events that trigger the change of state of a process in execution.

                  

--------------------------------------------------------------------------------------------------------------------------

Q3.)    Define Deadlock. Explain necessary conditions for deadlock.

Ans.)    Deadlock occurs when we have a set of processes [not necessarily all the processes in the system], each holding some resources, each requesting some resources, and none of them is able to obtain what it needs, i.e. to make progress. We will usually reason in terms of resources R1, R2... Rm and processes P1, P2... Pn. A process Pi that is waiting for some currently unavailable resource is said to be blocked.

Resources can be pre-emptable or non-pre-emptable. A resource is pre-emptable if it can be taken away from the process that is holding it [we can think that the original holder waits, frozen, until the resource is returned to it]. Memory is an example of a pre-emptable resource. Of course, one may choose to deal with intrinsically pre-emptable resources as if they were non-pre-emptable. In our discussion we only consider non-pre-emptable resources.

Necessary conditions for deadlock: -

1.      Mutual exclusion: At least one of the resources is non-sharable, that is, only one process at a time can use the resource.

2.      Hold and wait: A process exists that is holding on to at least one resource and waiting for an additional resource held by another process.

3.      No preemption: Resources cannot be preempted, that is, a resource is released only by the process that is holding it.

4.      Circular wait: There exist a set of processes P₀, P₁… P_n of waiting processes such that P0 is waiting for a resource held by P₁, P₁ is waiting for a resource held by P₂… P_n-1 is waiting for a resource held P_n and P_n is in turn waiting for a resource held by P₀.

--------------------------------------------------------------------------------------------------------------------------

Q4.)    Differentiate Sequential access and Direct access methods.

Ans.)    Sequential Access: -  

In this simple access method, information in a file is accessed sequentially one record after another. To process the i^th record all the i-1 records previous to i must be accessed. Sequential access is based on the tape model that is inherently a sequential access device. Sequential access is best suited where most of the records in a file are to be processed. For example, transaction files.

Direct Access: -

Sometimes it is not necessary to process every record in a file. It may not be necessary to process records in the order in which they are present. Information present in a record of a file is to be accessed only if some key value in that record is known. In all such cases, direct access is used. Direct access is based on the disk that is a direct access device and allows random access of any file block. Since a file is a collection of physical blocks, any block and hence the records in that block are accessed. For example, master files. Databases are often of this type since they allow query processing that involves immediate access to large amounts of information. All reservation systems fall into this category. Not all operating systems support direct access files. Usually files are to be defined as sequential or direct at the time of creation and accessed accordingly later. Sequential access of a direct access file is possible but direct access of a sequential file is not.

--------------------------------------------------------------------------------------------------------------------------

Q5.)    Differentiate Daisy chain bus arbitration and Priority encoded bus arbitration.

Ans.)    Daisy chain arbitration: Here, the requesting device or devices assert the signal bus request. The bus arbiter returns the bus grant signal, which passes through each of the devices which can have access to the bus. Here, the priority of a device depends solely on its position in the daisy chain. If two or more devices request the bus at the same time, the highest priority device is granted the bus first, and then the bus grant signal is passed further down the chain. Generally a third signal (bus release) is used to indicate to the bus arbiter that the first device has finished its use of the bus. Holding bus request asserted indicates that another device wants to use the bus.

Priority encoded arbitration: Here, each device has a request line connected to a centralized arbiter that determines which device will be granted access to the bus. The order may be fixed by the order of connection (priority encoded), or it may be determined by some algorithm preloaded into the arbiter. Following figure shows this type of system. Note that each device has a separate line to the bus arbiter.

--------------------------------------------------------------------------------------------------------------------------

Q6.)    Explain LRU page replacement algorithm with example.

Ans.)    LRU page replacement algorithm: -

The main distinction between FIFO and optimal algorithm is that the FIFO algorithm uses the time when a page was brought into memory (looks back) whereas the optimal algorithm uses the time when a page is to be used in future (looks ahead). If the recent past is used as an approximation of the near future, then replace the page that has not been used for the longest period of time. This is the least recently used (LRU) algorithm.

Illustration:

Reference string:    7  0  1  2  0   3   0   4   2   3   0   3   2   1   2   0   1   7   0  1

Memory frames:  3

Page faults:    7 7 7 2   2   4 4 4 0   1 1 1

                        0 0 0 0   0   0 0 3 3    3 0 0

                               1 1   3        3 2 2 2       2 2 7

Number of page faults = 12.

The LRU page replacement algorithm with 12 page faults is better than the FIFO algorithm with 15 faults. The problem is to implement the LRU algorithm. An order for the frames by time of last use is required. Two options are feasible:

1.       By use of counters

2.       By use of stack

In the first option using counters, each page table entry is associated with a variable to store the time when the page was used. When a reference to the page is made, the contents of the clock are copied to the variable in the page table for that page. Every page now has the time of last reference to it.

According to the LRU page replacement algorithm the least recently used page is the page with the smallest value in the variable associated with the clock. Overheads here include a search for the LRU page and an update of the variable to hold clock contents each time a memory reference is made. In the second option a stack is used to keep track of the page numbers. A page referenced is always put on top of the stack. Therefore the top of the stack is the most recently used page and the bottom of the stack is the LRU page. Since stack contents in between need to be changed, the stack is best implemented using a doubly linked list. Update is a bit expensive because of the number of pointers to be changed, but there is no necessity to search for a LRU page.

LRU page replacement algorithm does not suffer from Belady’s anomaly. But both of the above implementations require hardware support since either the clock variable or the stack must be updated for every memory reference.

--------------------------------------------------------------------------------------------------------------------------

SMU Assignment - (Sem-2) - MCA2030- OBJECT ORIENTED PROGRAMMING – C++

MCA2030- OBJECT ORIENTED PROGRAMMING – C++

Q1.)    Write short notes on:

a) Switch statement

b) Conditional Operator

Ans.)    (a) Switch Statement: Nested ifs can be confusing if the if statement is deeply nested. One alternative to nested if is the switch statement which can be used to increase clarity in case of checking the different values of the same variable & execute statements accordingly.

Syntax:

Switch (variable name)

{Case value 1: statement1;

Break;

{Case value 2: statement2;

Break;

{Case value 3: statement3;

Break;

Default: statement4;

}

If the variable in the switch statement is equal to value 1 then statement 1 is executed, if it is equal to value 2 then statement 2 is executed, if it is value 3 then statement 3 is executed. If the variable value is not in any of the cases listed then the default case statement 4 is executed. The default case specification is optional; however keeping it is a good practice. It can also be used for displaying any error message. Each case can have any number of statements. However every case should have a break statement as the last statement. Break statement takes the control out of the switch statement. The absence of the break statement can cause execution of statements in the next case. No break is necessary for the last case. In the above example, default case does not contain a break statement.

(b) Conditional Operator: Conditional Operator (? :) is a handy operator which acts like a shortcut for it else statement. If you had to compare two variables a and b ad then depending on which is larger, you wanted to store that variable in another variable called large. You would do this using if else statement in the following way:

If (a>b)

Large=a;

Else

Large=b;

The above can e done using conditional operator in the following way:

Large= (a>b)? a: b ;

--------------------------------------------------------------------------------------------------------------------------

Q2.)    Differentiate Classes and Objects. Write a program to create a class and its object.

Ans.)    Classes provide users a method to create user defined data types. We have seen two types of user defined data types structures and enumeration. Both are primarily used for modeling data only. In several real life situation, we would require to model functionality of the data type along with the data together. However, in C++ we can use structures same as classes by binding functions with data. But usually the structures are only used when we want to group data and classes when we want to group both data and functions.

Classes can model either physical or real things such as employee, product, customer etc. or it can model a new data type such user defined string, distance, etc.

Objects have the same relationship to a class that a variable has to a data type. Object is an instance of a class. Class is a definition, objects are used in the program that enables you to store data use them.

To understand the various syntactical requirements for implementing a class, let us take an example.

#include <iostream.h>

Class distance

{

 Private:

Int feet;

Int inches;

public;

Void set distance (int a, int b)

{

  Feet=a;

  Inches=b;

}

Void display ()

{count<<feet<<”ft”<<inches<<”inches ;}

};

Void main ()

{Distance d1;

D1. Set distance (10, 2);

D1.display ();

}

In the above program, we have created a class called distance with two data members feet and inches and two functions or methods set distance and display (). Classes are defined with the keyword class followed by the name of the class. The object of this class is d1. Every objects of a class have their own copy of data, but all the objects of a class share the functions. No separate copy of the methods is created for each and every object. Objects can access the data through the methods. To invoke a method, object name .method name is used. The methods defined in the class can only be invoked by the objects of the class. Without an object, methods of the function cannot be invoked.

You can see in the above program, the data elements feet inches are defined as private. The methods are defined as public. These are known as access specifies. Data and functions in a class can have any one access specifies: private, public and protected. Protected access specifier. Private data and functions can be accessed only by the member functions of the class. None of the external functions can be accessed through the objects of the class externally from any function. However to access these data and functions, we need to have an object of that class.

--------------------------------------------------------------------------------------------------------------------------

Q3.)    Describe operator overloading. List the operators that cannot be overloaded.

Ans.)    Operator overloading is just “syntactic sugar,” which means it is simply another way for you to make a function call. The difference is that the arguments for this function don’t appear inside parentheses, but instead they surround or are next to characters you’ve always thought of as immutable operators. There are two differences between the use of an operator and an ordinary function call. The syntax is different; an operator is often “called” by placing it between or sometimes after the arguments. The second difference is that the compiler determines which “function” to call. For instance, if we are using the operator + with floating-point arguments, the compiler “calls” the function to perform floating-point addition (this “call” is typically the act of inserting in-line code, or a floating-point-processor instruction). If we use operator + with a floating-point number and an integer, the compiler “calls” a special function to turn the int into a float, and then “calls” the floating-point addition code.

But in C++, it’s possible to define new operators that work with classes. This definition is just like an ordinary function definition except that the name of the function consists of the keyword operator followed by the operator. That’s the only difference, and it becomes a function like any other function, which the compiler calls when it sees the appropriate pattern.

The operators that cannot be overloaded are:

1.   ?: (conditional)

2.   . (Member selection)

3.   .* (member selection with pointer-to-member)

4.   :: (scope resolution)

5.   sizeof (object size information)

6.   typeid (object type information)

--------------------------------------------------------------------------------------------------------------------------

Q4.)    What are the advantages of Polymorphism? How it can be implemented?

Ans.)    Polymorphism means the ability to take more than one form. An operation may exhibit different behaviors in different instances. The behavior depends on the data types used in the operation.

Advantages of polymorphism:

1.      Same interface could be used for creating methods with different implementations

2.      Reduces the volume of work in terms of distinguishing and handling various objects

3.      Supports building extensible systems

4.      Complete implementation can be replaced by using same method signatures

Polymorphism can be implemented in following ways:

a)      There has to be a pointer of the derived class that has implemented the polymorphic function that holds the address of the derived class object.

b)      The function must be declared as virtual in both the base class and in the derived class that overrides the function.

c)      The function must be declared as pure virtual.

d)      There has to be a base class pointer holding the address of a base or derived class object that has implemented the polymorphic function.

e)      The function must be declared as virtual in the base class.

--------------------------------------------------------------------------------------------------------------------------

Q5.)    Differentiate Containers and Iterators.

Ans.)    Containers: 

STL provides a number of container types, representing objects that contain other objects. The STL contains sequence containers & associative containers. The standard sequence containers include vector, deque & list. Sequence containers in, as their name suggests, store data in linear sequence. The standard associative containers are set, multiset, map & multimap. Associative containers are a generalization of sequences. Sequences are indexed by integers; associative containers can be indexed by any type. Other types of containers are – bitset (stores series of bits similar to a fixed-sized vector of bools, also optimizes for space), & valarray (another C-like array vector, but is designed for high speed numeric’s at the expense of some programming ease & general purpose use. It has many features that make it ideally suited for use with vector processors in traditional vector supercomputers & SIMD units in consumer-level scalar processors, & also ease vector mathematics programming even in scalar computers).

Iterators:

Iterators are like location specifiers for containers or streams of data, in the same way that an int* can be used as location specifier for an array of integers, or an if stream can be used as a location specifier for a file. The STL implements five different types of Iterators. These are input Iterators (which can only be used to read a sequence of values), output Iterators (which can only be used to write a sequence of values), forward Iterators (which can be read, written to, & move forward), bidirectional Iterators (which are like forward Iterators but can also move backwards) & random access Iterators (which can move freely any number of steps in one operation).

It is possibly to have bidirectional Iterators act like random access Iterators, as moving forward ten steps could be done by simply moving forward a step at a time a total of ten times. However, having distinct random access Iterators offers efficiency advantages. For example, a vector would have a random access iterator, but a list only a bidirectional iterator.

--------------------------------------------------------------------------------------------------------------------------

Q6.)    Describe the two basic models in exception handling theory.

Ans.)    There are two basic models in exception-handling theory. In termination (which is what C++ supports) we assume the error is so critical there’s no way to get back to where the exception occurred. Whoever threw the exception decided there was no way to salvage the situation, & they don’t want to come back. The alternative is called resumption. It means the exception handler is expected to do something to rectify the situation, & then the faulting function is retired, presuming success the second time. If you want resumption, you still hope to continue execution after the exception is handled, so your exception is more like a function call – which is how you should set up situations in C++ where we want resumption- like behavior (that is, don’t throw an exception; call a function that fixes the problem). Alternatively, place your try block inside a while loop that keeps reentering the try block until the result is satisfactory.

Historically, programmers using operating systems that supported presumptive exception handling eventually ended up using termination-like code & skipping resumption. So although resumption sounds attractive at first, it seems it isn’t quite so useful in practice. One reason may be the distance that can occur between the exception & its handler; it’s one thing to terminate to a handler that’s far away, but to jump to that handler & then back again may be too conceptually difficult for large systems where the exception can be generated from many points.

--------------------------------------------------------------------------------------------------------------------------

SMU Assignment - (Sem-2) - MCA2050- COMPUTER ARCHITECTURE

MCA2050- COMPUTER ARCHITECTURE

Q1.)    Explain the concepts of concurrent and parallel execution.

Ans.)    Concurrent Execution: - In Concurrent Execution, the key problem is scheduling the competing the processes or threads for service (execution) by a server (processor). Scheduling is done as per two rules:

·         Pre-emption rule: This rule governs whether servicing a client can be interrupted or not & if so, on what occasions. The pre-emption rule may either specify time sharing or priorities for clients or processes. Time sharing restricts continuous service for each client to a specific duration. Priorities may cause an interruption in the service for a client, which is low priority, if a higher priority client requests the service.

·         Selection rule: It states how a competing client is selected for service. The selection rule specifies an algorithm to determine a rank from parameters, such as priority & time of arrival. The ranks of all competing clients are computed, & the client with the highest rank scheduled for service.

Parallel Execution: - Parallel computing is the simultaneous use of multiple computer resources to solve a computational problem. Each part of the problem is broken down into series of instructions. The instructions from each part execute simultaneously on different CPUs.

On a multiprocessor computer, each process can be assigned a separate processor. If only one processor is available, the effect of parallel processing can be simulated by having the processor run each process by turn for a short time.

--------------------------------------------------------------------------------------------------------------------------

Q2.)    Explain any five types of addressing modes.

Ans.)    Programs are normally written in a high-level language, which enables the programmer to use constants, local and global variables, pointers and arrays. When translating a high-level language program into assembly language, the computer must be able to implement these constructs using the facilities provided in the instruction set of the computer in which the program will be run. The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes.

The five types of addressing modes are: -

1.      Direct addressing mode

2.      Immediate addressing mode

3.      Register addressing mode

4.      Register Indirect addressing mode

5.      Displacement addressing mode

1.) Direct addressing mode: -

·         EA = A

·         Address field contains address of operand.

·         Effective address (EA) = address field (A) e.g. ADD A

·         Add contents of cell A to accumulator.

·         Look in memory at address A for operand.

·         Single memory reference to access data.

·         No additional calculations to work out effective address.

·         Limited address space

The operand is in memory location; the address of this location is given explicitly in the instruction. (In some assembly languages, this mode is called Direct.)

The instruction Move LOC, R2 uses these two modes. Processor registers are used as temporary storage locations where the data in a register are accessed using the Register mode. The Absolute mode can represent global variables in a program. A declaration such as Integer A, B; in a high-location language program will cause the compiler to allocate a memory location to each of the variable A & B. Whenever they are referenced later in the program, the compiler can generate assembly language instructions that use the Absolute mode to access these variables. Next, let us consider the representation of constants. Address & data constants can be represented in assembly language using the immediate mode.

2.) Immediate Addressing Mode: -

The operand is actually present in the instruction.

Operand = A

·         Can be used to define & use constants, or set initial values.

·         Operand is part of instruction

·         Operand = address field

·         e.g. ADD 5

·         Add 5 to contents of accumulator

·         5 is operand

·         No memory reference to fetch data

·         Fast

·         Limited range

For example, the instruction Move 200 immediate, R0 places the value 200 in register R0. Clearly, the immediate mode is only used to specify the value of a source operand. Using a subscript to denote the immediate mode is not appropriate in assembly languages. A common convention is to use the sharp sign (#) in front of the value to indicate that this value is to be used as an immediate operand.

Hence, we write the instruction above in the form Move # 200, R0. Constant values are used frequently in high-level language programs. For example, the statement

A = B + 6 contains 6. Assuring that A & B have been declared earlier as variables & may be accessed using the Absolute mode; this statement may be compiled as follows:

Move B, R1

Add #6, R1

Move R1, A

Constants are also used in assembly language to increment a counter, test for some bit pattern, & so on.

3.) Register Addressing Mode: -

·         Operand is held in register named in address field

·         EA = R

·         Limited number of registers

·         Very small address field needed

·         Shorter instructions

·         Faster instruction fetch

·         No memory access

·         Very fast execution

·         Very limited address space

·         Multiple registers help performance

·         Requires good assembly programming or compiler writing

                                               

4.) Register Indirect Addressing Mode: -

Register indirect addressing

EA = (R)

Operand is in memory cell pointed to by contents of register R

Large address space (2n)

Fewer memory access than indirect addressing

5.) Displacement Addressing Mode: -

·         EA = A + (R)

·         Address field hold two values

·         A = base value

·         R = register that holds displacement

·         Or vice versa

--------------------------------------------------------------------------------------------------------------------------

Q3.)    Describe the logical layout of RISC and CISC computers.

Ans.)    An important aspect of computer architecture is the design of the instruction set for the processor. The instruction set chosen for a particular computer determines the way that machine language programs are constructed. Early computers had small and simple instruction sets, forced mainly by the need to minimize the hardware used to implement them. As digital hardware became cheaper with the advent of integrated circuits, computer instructions tended to increase both in number and complexity. Many computers have instruction sets that include more than 100 and sometimes even more than 200 instructions. These computers also employ a variety of data types and a large number of addressing modes. The trend into computer hardware complexity was influenced by various factors, such as upgrading existing models to provide more customer applications, adding instructions that facilitate the translation from high-level language into machine language programs, and striving to develop machines that move functions from software implementa­tion into hardware implementation. A computer with a large number of in­structions is classified as a complex instruction set computer, abbreviated CISC. In the early 1980s, a number of computer designers recommended that computers use fewer instructions with simple constructs so they can be exe­cuted much faster within the CPU without having to use memory as often. This type of computer is classified as a reduced instruction set computer or RISC. In this section we introduce the major characteristics of CISC and RISC architec­tures and then present the instruction set and instruction format of a RISC processor.

Major Characteristics CISC architecture are: -

1.      A large number of instructions – typically from 100 to 250 instructions

2.      Some instructions that perform a specialized task & are used infrequently

3.      A large variety of addressing modes – typically from 5 to 20 different modes

4.      Variable length instruction formats

5.      Instructions that manipulate, operands in memory

Major Characteristics RISC architecture are:

1.      Relatively few instructions

2.      Relatively few addressing modes

3.      Memory access limited to load & store instructions

4.      All operations done within the registers of the CPU

5.      Fixed length, easily decoded instruction format

6.      Single cycle instruction execution

7.      Hard wired rather than micro-programmed control

Other Characteristics attributed to RISC architecture are:

1.      The relatively large number of registers in the processor unit

2.      Use of overlapped register windows to speed-up procedure call & return

3.      Efficient instruction pipeline

4.      Compiler support for efficient translation of high language programs into machine language programs

-------------------------------------------------------------------------------------------------------------------------

Q4.)    Explain concept of branch handling. What is delayed branching?

Ans.)    Branch is a flow altering instruction that we must handle in a special manner in pipelined processors. If the branch is taken, control is transferred to the instruction. If the branch is not taken, instructions available in the pipeline are used.

When the branch is taken, every instruction available in the pipeline, at different stages, is removed. Fetching of instructions begins at the target address. Due to this, the pipeline works inefficiently for three clock cycles. This process is called branch penalty.

Delayed Branching:

Another efficient way to reduce branch penalty is delayed execution. An instruction might be positioned after a branch instruction in the pipeline to produce delay. However, if the instruction slot is executed without waiting for the branch to be selected, it is called a delay slot. This means that we should put a valuable instruction in this instruction slot. We call this instruction slot a delay slot.

A number of processors, such as MIPS and SPARC make use of delayed execution for procedure calls as well as branching.

If any valuable instruction cannot be moved into delay slot, an NOP operation (no operation) is placed. This gives us the option to nullify the instruction in the delay slot.

--------------------------------------------------------------------------------------------------------------------------

Q5.)    Explain any five types of vector instructions in detail.

Ans.)    The five types of vector instructions are:

1.      Vector Reduction Instructions

2.      Vector- Scalar Instructions

3.      Vector- Vector Instructions

4.      Vector- Memory Instructions

5.      Gather & Scatter Instructions

1.) Vector Reduction Instructions: - These instructions accept one or two vectors as input & produce a scalar as output.

2.) Vector- Scalar Instructions: - This type of instruction is used in combining a scalar and a vector operand. Example: If A & B are vector registers & f is a function that operates on these operands, then, a vector-scalar operand can be shown as: Ai: = f (scalar, Bi)

3.) Vector- Vector Instructions: - This type of instruction is used for fetching vector operands from vector registers & producing results in another register. Example: If A, B, & C are vector registers & f is a function that operands on these operands, then, a vector- vector operand can be shown as: Ai: = f (Bi, Ci)

4.) Vector – Memory Instructions: - This instruction corresponds to vector load or vector store. Example for Vector Load: A: = f (M) where M is a memory register

Example for Vector Store: M; = f (A)

5.) Gather & Scatter Instructions: - Gather is an operation that fetches the non-zero elements of a sparse vector from memory. Example: A x Vo: = f (M)

Scatter stores a vector in a sparse vector into memory. Example: M: = f (A x Vo)

--------------------------------------------------------------------------------------------------------------------------

Q6.)    Write short notes on:

a) UMA

b) NUMA

Ans.)(a) UMA: - UMA is a shared memory architecture used in parallel computers. All the processors in the UMA model share the physical memory uniformly. In a UMA architecture, access time to a memory location is independent of which processor makes the request or which memory chip contains the transferred data. Uniform Memory Access computer architecture are often contrasted with Non-Uniform Memory Access (NUMA) architectures. In the UMA architecture, each processor may use a private cache. Peripherals are also shared in some fashion. The UMA model is suitable for general purpose & time sharing applications by multiple users. It can be used to speed up the execution of a single large program in time critical applications.

(b) NUMA: - NUMA is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to a processor. A processor can access its own local memory faster than non-local memory, that is , memory local to another processor or memory shared between processors. NUMA architectures logically follow in scaling from symmetric multiprocessing (SMP) architectures. A NUMA system without cache coherence is more or less equivalent to a cluster.

 ------------------------------------------------------------------------------------------------------------------------